Keelung, Taiwan

Chun-Yen Chen

This inventor holds 1 USPTO granted patent. Top assignee: United Microelectronics Corp.. Active years: 2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chun-Yen Chen. Retrieved from https://idiyas.com/inventor/chun-yen-chen-hjirgim9

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2014

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Chun-Yen Chen: Semiconductor Device Fabrication Inventor.

Introduction

Chun-Yen Chen is an inventor associated with Keelung, Taiwan. His work includes a patented method for fabricating semiconductor devices, and he is affiliated with United Microelectronics Corporation.

Latest Patents

Chen is named on 1 patent, titled “Method for Fabricating Semiconductor Device.” The method forms a patterned bonding layer in the scribe-line region of a device wafer and bonds a handle wafer to it. Dicing along the scribe line divides the device wafer into individual dies while simultaneously removing the patterned bonding layer, allowing the dies to separate from the handle wafer.

Career Highlights

Chen’s patent addresses wafer handling and die separation during semiconductor manufacturing. The approach combines the bonding and dicing steps to facilitate separation of the divided dies from the handle wafer.

Collaborations

Chen’s listed coworkers include Chine-Li Wang and Hung-Hsien Chang. His company affiliation is United Microelectronics Corporation.

Conclusion

Chun-Yen Chen’s patent describes a semiconductor fabrication method designed to simplify die separation through a patterned bonding layer and a coordinated dicing process.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…