Hsinchu, Taiwan

Chun-Ting Lee

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chun-Ting Lee. Retrieved from https://idiyas.com/inventor/chun-ting-lee-nreaeadz

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations by Chun-Ting Lee

Introduction

Chun-Ting Lee is an inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology. His work focuses on developing advanced semiconductor structures that enhance performance and efficiency.

Latest Patent Applications

Chun-Ting Lee has filed a patent application titled "SEMICONDUCTOR STRUCTURE HAVING SELF-ALIGNED INSULATING FEATURE AND METHODS FOR MANUFACTURING THE SAME." This application describes a semiconductor structure that includes a substrate, a channel structure, a gate structure, two gate spacers, and an insulating feature. The gate structure is positioned on the channel structure and features an upper gate portion that is elevated above the uppermost surface of the channel structure. The two gate spacers are located on opposite sides of the upper gate portion, each having an upward surface with a concave profile. The insulating feature is placed over the upper gate portion and conforms to the concave profiles of the gate spacers, resulting in an inverted U-shaped profile. This insulating feature includes a cap portion that rests on the upper surface of the upper gate portion and extends beyond its edge. The application also discloses methods for manufacturing this semiconductor structure.

Conclusion

Chun-Ting Lee's innovative approach to semiconductor structures showcases his commitment to advancing technology in this critical field. His patent application reflects his expertise and potential impact on future developments in semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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