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For the Inventor, By the Inventor

Gyeonggi-do, South Korea

Choong-sun Shin

This inventor holds 5 USPTO granted patents. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2001-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Choong-sun Shin. Retrieved from https://idiyas.com/inventor/choong-sun-shin-3me1ed2j

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 5

% Patents Active = 20.0

Average Co-Inventor Count = 2.1

ph-index = 5

Forward Citations = 138(Granted Patents)


Location History:

  • Kyungki-do, KR (2001)
  • Seongnam, KR (2005)
  • Sungnam, KR (2005)
  • Gyeonggi-do, KR (2007 - 2011)

Company Filing History:

goldMedal5 out of 138,671 
 
Samsung Electronics Co., Ltd.
 patents

Years Active: 2001-2011

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5 patents (USPTO):Explore Patents
1. 7982245 - Circuit with fuse/anti-fuse transistor with selectively damaged gate insulating layer (2011-07-19),
2. 7295488 - Apparatus and methods for generating a column select line signal in semiconductor memory device (2007-11-13),
3. 6909650 - Circuit and method for transforming data input/output format in parallel bit test (2005-06-21),
4. 6839291 - Method for controlling column decoder enable timing in synchronous semiconductor device and apparatus thereof (2005-01-04),
5. 6262938 - Synchronous DRAM having posted CAS latency and method for controlling CAS latency (2001-07-17),

Title: The Innovations of Choong-sun Shin

Introduction

Choong-sun Shin is a prominent inventor based in Gyeonggi-do, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 5 patents. His work focuses on enhancing the functionality and efficiency of semiconductor devices.

Latest Patents

One of Choong-sun Shin's latest patents is titled "Circuit with fuse/anti-fuse transistor with selectively damaged gate insulating layer." This invention discloses a semiconductor integrated circuit that includes a main transistor and at least one fuse or anti-fuse transistor. Each transistor type features an active region formed in a semiconductor substrate, a gate stack with a gate insulation layer, and a gate electrode. Notably, the gate insulation layer of the fuse/anti-fuse transistor is selectively damaged during fabrication, which enhances its performance.

Another significant patent is "Apparatus and methods for generating a column select line signal in semiconductor memory device." This apparatus generates a column select line signal in response to a column select line enable signal. The signal has varying pulse widths depending on the operational mode of the signal generator, allowing for improved functionality in semiconductor memory devices.

Career Highlights

Choong-sun Shin is currently employed at Samsung Electronics Co., Ltd., a leading company in the technology sector. His work at Samsung has allowed him to contribute to cutting-edge innovations in semiconductor technology.

Collaborations

Throughout his career, Choong-sun Shin has collaborated with notable colleagues, including Sang-Seok Kang and Jin-ho Ryu. These collaborations have furthered advancements in their respective fields and contributed to the success of their projects.

Conclusion

Choong-sun Shin's contributions to semiconductor technology through his patents and work at Samsung Electronics Co., Ltd. highlight his role as an influential inventor. His innovative approaches continue to shape the future of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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