Taipei, Taiwan

Ching-In Wu

This inventor holds 1 USPTO granted patent. Top assignee: United Microelectronics Corp.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ching-In Wu. Retrieved from https://idiyas.com/inventor/ching-in-wu-hqgv4tv6

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: The Innovative Contributions of Ching-In Wu

Introduction

Ching-In Wu is a notable inventor based in Taipei, Taiwan. He has made significant contributions to the field of semiconductor technology. His work focuses on the development of advanced transistors, which are crucial components in modern electronic devices.

Latest Patents

Ching-In Wu holds a patent for a "Transistor with fin structure and nanosheet and fabricating method of the same." This innovative transistor design features a fin structure and a nanosheet that enhances its performance. The first gate portion is strategically placed on the fin structure, with source/drain layers extending into the fin structure. The nanosheet is positioned above the first gate portion, effectively connecting the source/drain layers and improving the transistor's efficiency.

Career Highlights

Wu is currently employed at United Microelectronics Corporation, a leading company in the semiconductor industry. His work at this organization has allowed him to push the boundaries of technology and contribute to the advancement of electronic components.

Collaborations

Ching-In Wu collaborates with Cheng-Tung Huang, a talented female engineer. Their partnership exemplifies the importance of teamwork in driving innovation within the tech industry.

Conclusion

Ching-In Wu's contributions to transistor technology highlight his role as a key inventor in the semiconductor field. His innovative designs and collaborations continue to shape the future of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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