Hsinchu, Taiwan

Chien-Ming Hu

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chien-Ming Hu. Retrieved from https://idiyas.com/inventor/chien-ming-hu-uk62x56m

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 19(Granted Patents)


Company Filing History:


Years Active: 2004

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Chien-Ming Hu: Semiconductor Process Inventor.

Introduction

Chien-Ming Hu is an inventor associated with Hsinchu, Taiwan, and Taiwan Semiconductor Manufacturing Company Limited. His listed patent concerns the formation of a silicon nitride–silicon dioxide gate stack for MOSFET devices.

Latest Patents

Hu is credited with 1 patent: “Method of Forming a Silicon Nitride-Silicon Dioxide Gate Stack.” The method forms the silicon dioxide component after the overlying silicon nitride component. Oxygen ions or ultraviolet-generated oxygen radicals pass through the nitride and reach the semiconductor substrate, where annealing enables them to form the underlying silicon dioxide layer. The described approach aims to produce a nitrogen profile with improved barrier characteristics and less interface charge than stacks made by depositing silicon nitride over previously grown silicon dioxide.

Career Highlights

Hu’s listed invention addresses the fabrication of gate insulators, an important component in MOSFET technology. His work is associated with Taiwan Semiconductor Manufacturing Company Limited and the semiconductor industry in Hsinchu.

Collaborations

Mong-Song Liang and Shih-Chang Chen are identified as Hu’s coworkers. The available information does not specify their roles in developing or patenting this invention.

Conclusion

Chien-Ming Hu’s listed patent describes an alternative process for forming a silicon nitride–silicon dioxide gate stack, with the stated goal of improving its barrier properties and reducing interface charge.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…