Taipei, Taiwan

Chien-Chou Chen

This inventor holds 8 USPTO granted patents and 1 published patent application. Top assignees: Inventec Corp., Industrial Technology Research Institute, Aspeed Technology Inc.. Active years: 2004-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chien-Chou Chen. Retrieved from https://idiyas.com/inventor/chien-chou-chen-7r3kn0vb

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8 

% Patents Active = 87.5

Average Co-Inventor Count = 2.7

ph-index = 3

Forward Citations = 13(Granted Patents)


Location History:

  • Taipei, TW (2004 - 2015)
  • Hsinchu, TW (2017 - 2018)

Company Filing History:


Years Active: 2004-2018

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8 patents (USPTO):Explore Patents

Title: Chien-Chou Chen: Innovator in Server Systems and Wafer Bonding Technologies

Introduction

Chien-Chou Chen is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the fields of server systems and wafer bonding technologies. With a total of 8 patents to his name, Chen's work has had a considerable impact on the technology industry.

Latest Patents

One of Chen's latest patents is for a server system with a Baseboard Management Controller (BMC) that includes a hard disk drive monitoring function. This innovative server system comprises a host system, at least one hard disk drive, a host bus adapter, at least one indicator, a storage enclosure processor, a BMC, and a snoop device. The host bus adapter issues a bus signal suitable for transmission over a serial bus based on the received drive state from the hard disk drive. The storage enclosure processor drives the indicators to corresponding states, while the BMC is connected to a network. The snoop device detects the bus signal and sends a warning signal to the BMC in the event of a drive failure.

Another notable patent is for a wafer bonding method and device that features reduced thermal expansion. This bonding structure includes a first substrate, a second substrate, and an adhesive layer. The first substrate has multiple trenches filled with the adhesive layer, which enhances the bonding process and reduces thermal expansion issues.

Career Highlights

Chien-Chou Chen has worked with several reputable organizations throughout his career. He has been associated with Inventec Corporation and the Industrial Technology Research Institute, where he has contributed to various innovative projects and advancements in technology.

Collaborations

Chen has collaborated with notable colleagues, including Kuo-Shu Chiu and Szu-Hsien Lee, who have also made significant contributions to their respective fields.

Conclusion

Chien-Chou Chen's innovative work in server systems and wafer bonding technologies showcases his expertise and dedication to advancing technology. His contributions continue to influence the industry and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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