This inventor holds 2 USPTO granted patents and 3 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Chieh-Lung Lai and Integrated Circuit Packaging
Introduction
Chieh-Lung Lai is an inventor associated with Taichung City, Taiwan. His patent work concerns integrated circuit packaging, including interposer structures and methods for forming them.
Latest Patents
The provided information lists 1 patent for Lai: “Integrated Circuit Packages and Methods of Forming the Same.” The invention describes an integrated circuit package with an interposer containing multiple redistribution layers. In its central region, a second redistribution layer sits above a first redistribution layer, while a dielectric layer covers the first redistribution layer in the periphery and surrounds the second redistribution layer when viewed from above. A third redistribution layer extends over the second redistribution layer and the dielectric layer. A direct via passes through the dielectric layer, connecting a conductive feature in the third redistribution layer to a conductive feature in the first redistribution layer.
Career Highlights
Lai is associated with Taiwan Semiconductor Manufacturing Co., Ltd. His listed patent focuses on interposer design and electrical connections within integrated circuit packages.
Collaborations
The provided information identifies Hsien-Wei Chen and Meng-Liang Lin as Lai’s coworkers.
Conclusion
Chieh-Lung Lai’s listed invention addresses integrated circuit packaging through a layered interposer design and a direct-via connection between redistribution layers.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile