Hsinchu, Taiwan

Chia-Shiung Tsia

This inventor holds 2 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2003-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chia-Shiung Tsia. Retrieved from https://idiyas.com/inventor/chia-shiung-tsia

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 7.5

ph-index = 2

Forward Citations = 59(Granted Patents)


Company Filing History:


Years Active: 2003-2004

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2 patents (USPTO):Explore Patents

Title: Chia-Shiung Tsia: Innovator in Semiconductor Technology

Introduction

Chia-Shiung Tsia is a prominent inventor based in Hsin-Chu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approaches to manufacturing processes.

Latest Patents

One of his latest patents is titled "Method to preserve alignment mark optical integrity." This method focuses on protecting an alignment mark area during a chemical mechanical polishing (CMP) process. It involves forming a first material layer over a semiconductor wafer's process surface, which includes active areas and alignment mark trenches. A second material layer is then formed over the first, followed by lithographic patterning and etching to create lines adjacent to the alignment mark trenches. The CMP process is subsequently carried out to remove a portion of the second material layer.

Another notable patent is the "Method of forming planarized coatings on contact hole patterns of various duty ratios." This method describes the formation of a planarized photoresist coating on a substrate with holes of different duty ratios. A first photoresist, made of a Novolac resin and a diazonaphthoquinone photoactive compound, is coated and baked to fill the holes. The photoresist is then exposed without a mask, allowing the developer to thin it to a recessed depth within the holes. After hardening the photoresist, a second photoresist is applied to create a planarized film with minimal thickness variation. This method is particularly useful in fabricating MIM capacitors and forming trench patterns in dual damascene methods.

Career Highlights

Chia-Shiung Tsia is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work has significantly impacted the efficiency and effectiveness of semiconductor manufacturing processes.

Collaborations

He has collaborated with notable coworkers, including Chia-Tung Ho and Feng-Jia Shih, contributing to advancements in semiconductor technology.

Conclusion

Chia-Shiung Tsia's innovative patents and contributions to the semiconductor industry highlight his role as a key inventor in this field. His work continues to influence manufacturing processes and technology advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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