Zhu-ki, Taiwan

Chia-Nan Lin

This inventor holds 4 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2019-2026.


% Patents Active = 100.0

Average Co-Inventor Count = 3.6

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2019-2026

Loading Chart...
4 patents (USPTO):Explore Patents

Title: Chia-Nan Lin: Innovator in Semiconductor Technology

Introduction

Chia-Nan Lin is an inventor based in Chiayi County, Taiwan. He is known for his contributions to semiconductor technology, particularly in the area of low-stress passivation layers. Although he currently holds no granted patents, his innovative ideas are reflected in his patent applications.

Latest Patent Applications

Chia-Nan Lin's notable patent application is titled "LOW-STRESS PASSIVATION LAYER." This application details semiconductor devices and methods of forming the same. The method includes receiving a workpiece with a redistribution layer that is electrically coupled to an interconnect structure. It further describes the process of patterning the redistribution layer to create a recess that separates two conductive features. The application outlines the steps of depositing a dielectric layer and a nitride layer, as well as the removal of portions of the nitride layer over the corners of the conductive features.

Conclusion

Chia-Nan Lin's work in semiconductor technology showcases his innovative approach to improving device structures. His contributions, although not yet reflected in granted patents, highlight the potential for future advancements in the field.

Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
Loading…