Zhubei, Taiwan

Chi-Pei Wu

This inventor holds 1 USPTO granted patent and 2 published patent applications. Top assignee: Yield Microelectronics Corp.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chi-Pei Wu. Retrieved from https://idiyas.com/inventor/chi-pei-wu-xwuhlt1c

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Chi-Pei Wu and Low-Power Nonvolatile Memory Innovation.

Introduction

Chi-Pei Wu is an inventor associated with Zhubei, Taiwan, and Yield Microelectronics Corp. The available information identifies one patent associated with Wu.

Latest Patents

Wu’s patent, “Low-power programmable erasable nonvolatile memory,” describes a memory architecture designed to support programming and erasing operations. It includes memory arrays connected to common-source lines, word lines, and bit lines, along with a decoding device, electronic switches, storage capacitors, and a voltage-boosting circuit. The circuit charges a storage capacitor to enable a programming or erasing activity, while the decoding device connects memory lines to specified voltage levels.

The supplied information lists 1 patent for Wu.

Career Highlights

Wu’s listed patent focuses on low-power programmable and erasable nonvolatile memory. The available details associate Wu with Yield Microelectronics Corp., but do not provide further information about Wu’s role or career history.

Collaborations

The supplied information names Yu-Ting Huang and Ya-Ting Fan as Wu’s coworkers. It does not specify their roles in the patent or describe particular collaborative contributions.

Conclusion

Chi-Pei Wu’s listed patent presents a memory design that uses voltage control and storage capacitors to support programming and erasing operations, reflecting a focus on nonvolatile memory technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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