This inventor holds 1 USPTO granted patent. Top assignee: Synopsys, Inc.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Chi-Chun Chuang and Circuit-Design Innovation.
Introduction
Chi-Chun Chuang is an inventor associated with Synopsys, Inc. and based in Taipei City, Taiwan. His patent work addresses circuit-layout analysis for electrostatic discharge checking.
Latest Patents
The provided information identifies one patent associated with Chuang: “Power Routing Reduction in Circuit Design for Electrostatic Discharge Checking.” The method generates a graph whose nodes represent polygons across layers of a circuit layout, then traverses the graph from a source node to a sink node according to specified layer and connectivity rules. It prunes nodes not visited during traversal and retains the remaining nodes for use in the computation. This approach is designed to reduce power-routing complexity in circuit-design analysis. Chuang is credited with 1 patent in the supplied data.
Career Highlights
Chuang’s listed work connects semiconductor design automation with electrostatic discharge verification. His patent describes a graph-based method for selecting relevant layout elements, potentially helping streamline computations used in circuit-design workflows.
Collaborations
The supplied information lists Nicholas Stewart Palmer and Chih Yi Huang as Chuang’s coworkers. They are also associated with Synopsys, Inc. in the provided context.
Conclusion
Chi-Chun Chuang’s documented patent focuses on reducing circuit-layout analysis complexity through graph traversal and pruning, reflecting an innovation relevant to semiconductor design and verification.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile