McKinney, TX, United States of America

Cheryl Diane Hartfield

This inventor holds 4 USPTO granted patents and 3 published patent applications. Top assignee: Texas Instruments Corporation. Active years: 2002-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Cheryl Diane Hartfield. Retrieved from https://idiyas.com/inventor/cheryl-diane-hartfield

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2002-2009

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4 patents (USPTO):Explore Patents

Title: Innovations by Cheryl Diane Hartfield

Introduction

Cheryl Diane Hartfield is a notable inventor based in McKinney, TX (US). She has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. Her work focuses on evaluating fatigue crack growth in semiconductor devices, which is crucial for ensuring their reliability and performance.

Latest Patents

One of her latest patents is titled "Rapid method for sub-critical fatigue crack growth evaluation." This invention involves a method and system for evaluating sub-critical fatigue crack growth in a semiconductor device. It utilizes a plurality of energy pulses generated by an energy source that are repeatedly impinged onto the semiconductor device for a predefined time interval. The mechanical stress induced within the semiconductor device leads to the formation of a sub-critical fatigue crack, which can be detected to prevent fatigue failure. A rapid determination of pass or fail status for a fatigue test is achieved by comparing the total number of cycles to fatigue failure against a predefined benchmark.

Another significant patent is the "Statistical method for identifying microcracks in insulators." This method evaluates materials such as low-k dielectrics using a stress-generating test tool. The evaluation object is structured as a stack of adhering layers, including low-k dielectric and various metal layers. The invention establishes a numerical correlation between cracking in the barrier metal layer and damage in the insulating material. This method enhances the reliability of semiconductor devices by identifying potential microcracks before they lead to failure.

Career Highlights

Cheryl Hartfield is currently employed at Texas Instruments Corporation, where she continues to innovate in the semiconductor field. Her work has been instrumental in advancing the understanding of material behavior under stress, which is vital for the development of more reliable electronic components.

Collaborations

Throughout her career, Cheryl has collaborated with notable colleagues, including Thomas M Moore and Daniel Joseph Stillman. These collaborations have contributed to her success and the advancement of technology in her field.

Conclusion

Cheryl Diane Hartfield's contributions to semiconductor technology through her innovative patents demonstrate her expertise and commitment to enhancing device reliability. Her work continues to impact the industry positively, paving the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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