Hsinchu, Taiwan

Chenwei Huang

This inventor holds 1 USPTO granted patent. Top assignee: Applied Materials Israel Limited. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chenwei Huang. Retrieved from https://idiyas.com/inventor/chenwei-huang-v8dbwg36

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 7.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Innovations by Chenwei Huang in Semiconductor Examination

Introduction

Chenwei Huang is a notable inventor based in Hsinchu, Taiwan. She has made significant contributions to the field of semiconductor examination, particularly through her innovative patent. Her work focuses on enhancing the accuracy and efficiency of defect detection in semiconductor specimens.

Latest Patents

Chenwei Huang holds a patent titled "Defect offset correction for examination of semiconductor specimens." This patent presents a system and method for examining semiconductor specimens. The method involves obtaining a group of defect candidates linked to specific inspection locations in an inspection coordinate system. A trained machine learning model is utilized to assess the probability of each defect candidate being a defect of interest (DOI). The candidates are then ranked based on their probabilities. The process includes reviewing a portion of the ordered list of defect candidates with a review tool, receiving a predefined number of DOIs associated with review locations, and calculating an offset between the inspection and review coordinate systems based on these locations. This innovative approach significantly improves the defect examination process.

Career Highlights

Chenwei Huang is currently employed at Applied Materials Israel Limited, where she continues to develop her expertise in semiconductor technologies. Her work has been instrumental in advancing the methodologies used in semiconductor inspection and defect analysis.

Collaborations

Throughout her career, Chenwei has collaborated with esteemed colleagues, including Albert Kao and Shih-Wei Yang. These collaborations have fostered a productive environment for innovation and development in the semiconductor field.

Conclusion

Chenwei Huang's contributions to semiconductor examination through her innovative patent demonstrate her commitment to advancing technology in this critical area. Her work not only enhances the efficiency of defect detection but also showcases the importance of collaboration in driving innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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