Fremont, CA, United States of America

Chenming W Tung

USPTO Granted Patents = 5 

 

Average Co-Inventor Count = 2.7

ph-index = 4

Forward Citations = 93(Granted Patents)


Location History:

  • San Jose, CA (US) (1994)
  • Fremont, CA (US) (2004 - 2015)

Company Filing History:


Years Active: 1994-2015

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5 patents (USPTO):Explore Patents

Title: Innovations of Chenming W Tung

Introduction

Chenming W Tung is a notable inventor based in Fremont, CA, who has made significant contributions to the field of memory technology. With a total of five patents to his name, he has focused on advancing the design and functionality of SRAM memory devices.

Latest Patents

His latest patents include innovative systems and methods of sectioned bit line memory arrays, which feature hierarchical and other advanced characteristics. One of the key implementations involves a sectioned bit line of an SRAM memory device, where each sectioned bit line comprises a local bit line, a memory cell connected to the local bit line, and a pass gate coupled to the local bit line. The pass gate is designed to connect to a global bit line, allowing for enhanced performance and efficiency. Additionally, these sectioned bit lines are arranged in hierarchical arrays, which further optimize the memory device's functionality.

Career Highlights

Throughout his career, Chenming W Tung has worked with various companies, including GSI Technology, Inc. His work has been instrumental in developing cutting-edge memory solutions that address the growing demands of modern technology.

Collaborations

Some of his notable coworkers include Hsin You S Lee and Lee-Lean Shu, who have collaborated with him on various projects, contributing to the advancement of memory technology.

Conclusion

Chenming W Tung's innovative work in SRAM memory devices showcases his expertise and commitment to enhancing memory technology. His contributions continue to influence the industry and pave the way for future advancements.

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