The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 1994

Filed:

Sep. 23, 1992
Applicant:
Inventors:

Lee-Lean Shu, Cupertino, CA (US);

Chenming W Tung, San Jose, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365203 ; 36518911 ; 365204 ; 3652335 ;
Abstract

A static memory array incorporates a bit line equalization transistor which is normally conductive so that the quiescent condition of the bit lines is to remain equalized. The equalization transistor is cut off for a predetermined period in response to detection of address transition. When a subsequent address transition occurs before the expiration of a predetermined period, the equalization transistor conducts again briefly, which conduction is followed by a period of nonconduction, for a predetermined duration, as long as another address transition is not detected. The equalization technique is applicable to local data lines as well as the bit lines of the memory.


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