Taipei, Taiwan

Cheng-Te Chu

This inventor holds 2 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 1995-1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Cheng-Te Chu. Retrieved from https://idiyas.com/inventor/cheng-te-chu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 43(Granted Patents)


Location History:

  • Taipei, TW (1995)
  • Hsin-Chu, TW (1998)

Company Filing History:


Years Active: 1995-1998

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2 patents (USPTO):Explore Patents

Title: Cheng-Te Chu: Innovator in Semiconductor Technology

Introduction

Cheng-Te Chu is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approaches to solving complex challenges in the industry.

Latest Patents

One of his latest patents is a method of cleaning residue on a semiconductor wafer bonding pad. This method involves backside grinding a semiconductor wafer and forming a contamination-free bonding pad connection. The process includes forming a passivation layer over a metal layer, applying a photoresist pattern, and removing the passivation layer exposed in the opening. A novel step in this method is the removal of polymer residue using an etchant containing Dimethylsulfoxide (D.M.D.O.) and Monoethanolamine (M.E.A.), followed by an oxygen plasma treatment. The device side of the wafer is then covered with protective tape, and the backside is ground back, revealing a contamination-free bonding pad area for connection.

Another significant patent by Cheng-Te Chu is a method to prevent silicide bubbles in the VLSI process. This method fabricates an integrated circuit with polycide gate electrodes, ensuring no delamination of the overlying dielectric layer. The process includes forming a polysilicon layer over a gate dielectric on a silicon substrate, followed by the formation of a silicide layer. The substrate undergoes annealing in an inert gas atmosphere to remove excess fluorine gas, and a dielectric layer is deposited over the pattern of polycide gate electrodes, preventing bubble formation.

Career Highlights

Cheng-Te Chu works at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work has been instrumental in advancing semiconductor manufacturing processes and improving the reliability of integrated circuits.

Collaborations

Cheng-Te Chu has collaborated with notable colleagues, including Hsin-Chieh Huang and Yung-Haw Liaw. Their combined expertise has contributed to the successful development of innovative semiconductor technologies.

Conclusion

Cheng-Te Chu's contributions to semiconductor technology through his patents and work at Taiwan Semiconductor Manufacturing Company Limited highlight his role as a key innovator in the field. His methods for cleaning semiconductor wafers and preventing silicide bubbles are significant advancements that enhance the manufacturing process and product reliability.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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