Yunlin, Taiwan

Cheng-Hsien Chen

This inventor holds 2 USPTO granted patents and 1 EPO patent. Top assignee: United Microelectronics Corp.. Active years: 2021-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Cheng-Hsien Chen. Retrieved from https://idiyas.com/inventor/cheng-hsien-chen-wu35imgv

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

 

Average Co-Inventor Count = 6.9

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2021-2023

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2 patents (USPTO):Explore Patents

Title: Innovations by Cheng-Hsien Chen

Introduction

Cheng-Hsien Chen is a notable inventor based in Yunlin, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in wafer defect detection. With a total of 2 patents to his name, his work has advanced the methods used in the manufacturing and quality control of semiconductor wafers.

Latest Patents

Cheng-Hsien Chen's latest patents include a wafer backside defect detection method and a wafer backside defect detection apparatus. The wafer backside defect detection method involves cropping off a peripheral edge area of a wafer backside image where at least one notch is located. It connects adjacent white pixels to identify abnormal regions. If the total area of the top N abnormal regions exceeds 10% of the wafer's area, it indicates a roughness defect. Conversely, if this area is less than 1% and the largest abnormal region exceeds a predetermined length, it suggests a scratch defect. His automatic detecting method and apparatus utilize a series of units, including inputting, dividing, contouring, range analyzing, boundary analyzing, edge detecting, expanding, and overlapping units to effectively identify defects.

Career Highlights

Cheng-Hsien Chen is currently employed at United Microelectronics Corporation, a leading company in the semiconductor industry. His work focuses on enhancing the reliability and efficiency of wafer production processes. His innovative approaches have contributed to the advancement of defect detection technologies.

Collaborations

Cheng-Hsien Chen has collaborated with notable colleagues such as Chen-Hui Huang and Tzu-Ping Kao. Their combined expertise has fostered a productive environment for innovation and development in semiconductor technologies.

Conclusion

Cheng-Hsien Chen's contributions to wafer defect detection exemplify the importance of innovation in the semiconductor industry. His patents reflect a commitment to improving manufacturing processes and ensuring product quality.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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