Hsinchu, Taiwan

Chen Hsiang Leu

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2005.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chen Hsiang Leu. Retrieved from https://idiyas.com/inventor/chen-hsiang-leu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2005

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1 patent (USPTO):Explore Patents

Title: Chen Hsiang Leu: Innovator in Semiconductor Technology

Introduction

Chen Hsiang Leu is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the area of shallow trench isolation (STI) structures. His innovative methods aim to enhance the performance and reliability of semiconductor devices.

Latest Patents

Chen Hsiang Leu holds a patent for a method of forming an STI feature to avoid electrical charge leakage. This patent outlines a comprehensive process that includes providing a substrate with an overlying hardmask layer, patterning the hardmask layer, etching a trench, and forming a completed planarized STI structure filled with oxide. This invention is crucial for improving the efficiency of semiconductor devices.

Career Highlights

Chen is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work focuses on developing advanced technologies that contribute to the production of high-performance chips. His expertise in STI structures has positioned him as a valuable asset in the field.

Collaborations

Throughout his career, Chen has collaborated with talented professionals such as Wen Ting Tsai and Yih Song Chiu. These collaborations have fostered innovation and have led to advancements in semiconductor technology.

Conclusion

Chen Hsiang Leu's contributions to semiconductor technology through his innovative patent demonstrate his commitment to enhancing device performance. His work continues to influence the industry positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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