San Diego, CA, United States of America

Bryan Chin

This inventor holds 22 USPTO granted patents and 1 published patent application, primarily in Multi-Processor Systems. Top assignees: Cavium, Inc., Marvell Asia Pte., Ltd., 3 Leaf Systems, Inc.. Active years: 2009-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Bryan Chin. Retrieved from https://idiyas.com/inventor/bryan-chin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 22 

% Patents Active = 90.9

Average Co-Inventor Count = 4.2

ph-index = 6

Forward Citations = 151(Granted Patents)


Company Filing History:


Years Active: 2009-2024

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Areas of Expertise:
Chip Configuration
Memory Domains
Distributed Interrupts
Genomic Data Workflows
Instruction Ordering
Address Translation
Caching Metrics
Dynamic Execution
Debug Interfaces
Interconnect Protocols
Cache Coherency
Timer Subsystems
22 patents (USPTO):Explore Patents

Title: Innovations and Achievements of Inventor Bryan Chin

Introduction

Bryan Chin, based in San Diego, CA, is an accomplished inventor with a remarkable portfolio of 22 patents. His work primarily focuses on advanced computing systems and network security, showcasing his ability to blend technology with innovative solutions.

Latest Patents

Among his latest inventions is a patent for "Systems and methods for allowing flexible chip configuration by external entity." This invention enables the flexible reconfiguration of a network chip by an external entity, such as a baseboard management controller (BMC), while ensuring a secure environment for operation. The network chip is adeptly designed to designate certain networking ports to the BMC, allowing configuration without compromising secured areas. Additionally, his patent for "Local instruction ordering based on memory domains" introduces a method for managing instruction order in a computing system, utilizing an overloaded memory barrier instruction to dictate whether a global or local ordering constraint is applied.

Career Highlights

Bryan has made significant contributions while working at notable companies, including Cavium, Inc. and Marvell Asia Pte., Ltd. His experience at these organizations has honed his skills in innovation and technology development within the semiconductor and networking sectors.

Collaborations

Throughout his career, Bryan has collaborated with several distinguished professionals, including Richard Eugene Kessler and Wilson Parkhurst Snyder, II. These partnerships have enriched his projects and led to groundbreaking advancements in the field of network security and computing.

Conclusion

Bryan Chin's inventive prowess and contributions to technology reflect his dedication to innovation. With each patent, he continues to push the boundaries of what is possible, cementing his status as a leading inventor in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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