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For the Inventor, By the Inventor

Highland, NY, United States of America

Brian James Yavoich

This inventor holds 10 USPTO granted patents. Top assignee: International Business Machines Corporation. Active years: 2017-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Brian James Yavoich. Retrieved from https://idiyas.com/inventor/brian-james-yavoich

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 10

% Patents Active = 10.0

Average Co-Inventor Count = 4.9

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:

goldMedal10 out of 166,325 
 
International Business Machines Corporation
 patents

Years Active: 2017-2023

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10 patents (USPTO):Explore Patents
1. 11682452 - Local bit select with improved fast read before write suppression (2023-06-20),
2. 11150818 - Memory array having power consumption characteristics (2021-10-19),
3. 11067627 - Noise injection circuit (2021-07-20),
4. 10978140 - Random-access memory array memory cell selection (2021-04-13),
5. 10840895 - Fine-grained programmable delay and pulse shaping circuit (2020-11-17),
6. 9997218 - Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation (2018-06-12),
7. 9792967 - Managing semiconductor memory array leakage current (2017-10-17),
8. 9786339 - Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation (2017-10-10),
9. 9761289 - Managing semiconductor memory array leakage current (2017-09-12),
10. 9583211 - Incorporating bit write capability with column interleave write enable and column redundancy steering (2017-02-28),

Title: Innovator Spotlight: Brian James Yavoich

Introduction: Brian James Yavoich, an accomplished inventor based in Highland, NY, has made significant contributions to the field of technology with a remarkable portfolio of 10 patents. His work primarily focuses on innovations in memory array designs and power consumption reduction, showcasing his expertise in the semiconductor industry.

Latest Patents: Among his latest patents is the invention titled "Local Bit Select with Improved Fast Read Before Write Suppression." This innovative design includes a complex arrangement of pull-down devices that enhances the efficiency of reading and writing processes in memory architectures. Another notable patent, "Memory Array Having Power Consumption Characteristics," targets methods for optimizing power consumption estimation in distinct circuitries. This invention introduces a model that emulates toggle events of hardware components, improving the accuracy of power consumption assessments, thus advancing the performance of electronic systems.

Career Highlights: Brian is currently affiliated with the International Business Machines Corporation (IBM), a renowned leader in technology and innovation. His role at IBM allows him to push the boundaries of technological advancements, focusing on creating solutions that address contemporary challenges within the industry.

Collaborations: Throughout his career, Brian has collaborated with notable colleagues such as Paul Alan Bunce and John D. Davis. These partnerships have contributed to the development of sophisticated technologies and innovations, reinforcing the importance of teamwork in the invention process.

Conclusion: With a solid foundation in technology innovation and a proven track record of patents, Brian James Yavoich continues to make strides in the semiconductor domain. His contributions not only reflect his personal expertise but also the collaborative spirit of innovation that drives progress in the technology sector.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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