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For the Inventor, By the Inventor

Chino, CA, United States of America

Bradley S Masters

This inventor holds 2 USPTO granted patents. Top assignee: Western Digital Corporation. Active years: 1988-1989.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Bradley S Masters. Retrieved from https://idiyas.com/inventor/bradley-s-masters-uo7d4pap

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 2

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 2

Forward Citations = 42(Granted Patents)


Company Filing History:

goldMedal2 out of 234 
 
Western Digital Corporation
 patents

Years Active: 1988-1989

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2 patents (USPTO):Explore Patents
1. 4841174 - CMOS circuit with racefree single clock dynamic logic (1989-06-20),
2. 4740721 - Programmable logic array with single clock dynamic logic (1988-04-26),

Title: Top Inventor in Chino, California

Introduction

In Chino, California, one inventor stands out for his remarkable contributions to the field of innovation.

Latest Patents

His recent patents include advancements in technology that have garnered attention in various industries.

Career Highlights

Throughout his career, he has achieved significant milestones, showcasing his expertise and creativity.

Collaborations

He has collaborated with several prominent companies, enhancing his impact on the market.

Conclusion

This inventor's work continues to inspire and drive progress in his field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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