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Boise, ID, United States of America

Bradley J Howard

This inventor holds 48 USPTO granted patents, primarily in Plasma Etching. Top assignee: Micron Technology Incorporated. Active years: 1995-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Bradley J Howard. Retrieved from https://idiyas.com/inventor/bradley-j-howard

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 48

% Patents Active = 77.1

Average Co-Inventor Count = 1.6

ph-index = 9

Forward Citations = 302(Granted Patents)

Location History:

Livermore, CA (US) (2007 - 2009)
Boise, ID (US) (1995 - 2012)

Company Filing History:

48 out of 39,325

Micron Technology Incorporated

Years Active: 1995-2012

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Areas of Expertise:

Plasma Etching

Semiconductor Devices

Contact Openings

Striations Control

Temperature-Sensitive Etch

Integrated Circuit

Capacitor Formation

Photo-Definable Layers

Surface Defects

Recessed Container Cells

Self-Aligned Structures

Anisotropic Etch

48 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8093155 - Method of controlling striations and CD loss in contact oxide etch (2012-01-10),

2. 7625460 - Multifrequency plasma reactor (2009-12-01),

3. 7615164 - Plasma etching methods and contact opening forming methods (2009-11-10),

4. 7573116 - Etch aided by electrically shorting upper and lower sidewall portions during the formation of a semiconductor device (2009-08-11),

5. 7538028 - Barrier layer, IC via, and IC line forming methods (2009-05-26),

6. 7470625 - Method of plasma etching a substrate (2008-12-30),

7. 7323292 - Process for using photo-definable layers in the manufacture of semiconductor devices and resulting structures of same (2008-01-29),

8. 7271089 - Barrier layer, IC via, and IC line forming methods (2007-09-18),

9. 7255803 - Method of forming contact openings (2007-08-14),

10. 7122480 - Method of plasma etching a substrate (2006-10-17),

11. 7094699 - Etch aided by electrically shorting upper and lower sidewall portions during the formation of a semiconductor device (2006-08-22),

12. 6958297 - Plasma etching methods (2005-10-25),

13. 6812154 - Plasma etching methods (2004-11-02),

14. 6753264 - Method of controlling striations and CD loss in contact oxide etch (2004-06-22),

15. 6730609 - Etch aided by electrically shorting upper and lower sidewall portions during the formation of a semiconductor device (2004-05-04),

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Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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