This inventor holds 1 USPTO granted patent and 4 published patent applications. Top assignee: Globalfoundries U.S. Inc.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: The Innovative Contributions of Bradley A. Orner
Introduction
Bradley A. Orner is a notable inventor based in Ben Lomond, California. He has made significant contributions to the field of integrated circuit (IC) design, particularly through his innovative patent that enhances the layout configuration options for IC designs.
Latest Patents
Orner holds a patent for a "Parameterized cell with multiple layout configuration options." This invention discloses a process design kit (PDK) product, along with a design system and method that utilize the PDK to layout IC designs, including 3D IC designs. The PDK product comprises a storage medium and a library of cells, which include parameterized cells (pcells) representing various IC components. These pcells are customizable in terms of parameters and layout configurations. Each customizable pcell includes a script that can be executed by a processor, allowing for the placement of the pcell with tailored parameters in a 3D IC layout based on selected layout configuration options.
Career Highlights
Bradley A. Orner is currently employed at GlobalFoundries U.S. Inc., where he continues to push the boundaries of IC design technology. His work has been instrumental in advancing the capabilities of design systems used in the semiconductor industry.
Collaborations
Orner collaborates with talented professionals in his field, including his coworker Manubhai Patel Jignesh. Their combined expertise contributes to the innovative projects at GlobalFoundries.
Conclusion
Bradley A. Orner's contributions to the field of integrated circuit design through his patent and work at GlobalFoundries highlight his role as a significant inventor in the technology sector. His innovative approach to parameterized cells is paving the way for more efficient IC design processes.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile