Beeman C Strong

This inventor holds 32 USPTO granted patents and 8 published patent applications and 2 EPO patents. Top assignee: Intel Corporation. Active years: 2009-2026.

USPTO Granted Patents = 32 (Patent Applications = 8)

% Patents Active = 65.6

EPO Patents = 2 (Patent Applications = 5)

Average Co-Inventor Count = 4.4

ph-index = 4

Forward Citations = 120(Granted Patents)

Company Filing History:

32 out of 56,184

Intel Corporation

patents

Years Active: 2009-2026

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Areas of Expertise:

Microarchitecture Monitoring

Processor Trace

Event Logging

Virtual Counters

Interrupt Identification

Real-Time Security Monitoring

Power Event Tracing

Control Flow Integrity

Debug Trace Architecture

Timing Packet Generation

Data Packet Tracking

Trace Data Management

32 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12536086 - System, method and apparatus for high level microarchitecture event performance monitoring using fixed counters (2026-01-27),

2. 12386726 - Processor trace with suppression of periodic timing packets for low density trace sections (2025-08-12),

3. 12288072 - Methods, systems, and apparatuses for precise last branch record event logging (2025-04-29),

4. 12189509 - Processor including monitoring circuitry for virtual counters (2025-01-07),

5. 11960375 - Apparatus and method for pausing processor trace for efficient analysis (2024-04-16),

6. 11900115 - Apparatus and method to identify the source of an interrupt (2024-02-13),

7. 11614939 - Apparatus and method to identify the source of an interrupt (2023-03-28),

8. 11360876 - Apparatus and method for pausing processor trace for efficient analysis (2022-06-14),

9. 11061807 - Trace management during aborted speculative operations (2021-07-13),

10. 11055203 - Virtualizing precise event based sampling (2021-07-06),

11. 11048512 - Apparatus and method to identify the source of an interrupt (2021-06-29),

12. 11016773 - Processor trace extensions to facilitate real-time security monitoring (2021-05-25),

13. 10656697 - Processor core power event tracing (2020-05-19),

14. 10642711 - Apparatus and method for pausing processor trace for efficient analysis (2020-05-05),

15. 10592244 - Branch type logging in last branch registers (2020-03-17),

Title: Beeman C. Strong: Innovator in Processor Technology

Introduction

Beeman C. Strong, based in Portland, Oregon, is a distinguished inventor with a notable portfolio of 28 patents. His contributions to the field of processor technology have significantly advanced the efficiency and functionality of modern computing systems.

Latest Patents

Among his latest patents, Strong has developed an "Apparatus and method for pausing processor trace for efficient analysis." This invention involves executing instrumented code via a compiler that includes calls to un-instrumented code. The innovative aspect is the insertion of a resume tracing instruction, allowing selective processor tracing alongside un-instrumented code execution. Another recent patent is the "Apparatus and method to identify the source of an interrupt." This technology enables processors to process non-maskable interrupt (NMI) source information effectively, providing flexibility in handling NMI data with multiple processing modes.

Career Highlights

Beeman C. Strong has established himself as a key contributor at Intel Corporation, where he has driven advancements in processor design and functionality. His work has not only led to numerous patents but also enhanced the overall performance of Intel’s processing solutions.

Collaborations

Collaborating with esteemed colleagues Jason W. Brandt and Matthew C. Merten, Strong has combined his technical expertise with innovative minds, fostering an environment of creativity and problem-solving at Intel Corporation.

Conclusion

In conclusion, Beeman C. Strong exemplifies the spirit of innovation, with his contributions shaping the future of processor technology. His array of patents showcases his dedication to enhancing computational efficiency, marking him as a prominent figure in the technology landscape.