Kyoto, Japan

Atsushi Terai

This inventor holds 2 USPTO granted patents and 2 published patent applications. Top assignee: Flosfia Inc.. Active years: 2024-2025.

USPTO Granted Patents = 2 

% Patents Active = 100.0

Average Co-Inventor Count = 7.0

ph-index = 1


Company Filing History:


Years Active: 2024-2025

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2 patents (USPTO):Explore Patents

Title: Innovations by Atsushi Terai in Semiconductor Technology

Introduction

Atsushi Terai is a prominent inventor based in Kyoto, Japan. He has made significant contributions to the field of semiconductor technology, particularly in reducing leakage currents in semiconductor devices. His innovative work has led to the development of two notable patents.

Latest Patents

Atsushi Terai's latest patents focus on semiconductor devices designed to minimize leakage currents, which are crucial for enhancing the efficiency of power devices. The first patent describes a semiconductor device that includes an n+-type semiconductor layer containing a crystalline oxide semiconductor as a major component. This layer is complemented by an n−-type semiconductor layer placed on top, also made of a crystalline oxide semiconductor. A high-resistance layer is embedded within the n−-type layer, with specific depth requirements to optimize performance. Additionally, a Schottky electrode forms a junction with the n−-type layer, strategically positioned on the high-resistance layer.

The second patent presents a similar semiconductor device, emphasizing the importance of the high-resistance layer's placement. In this design, the bottom surface of the high-resistance layer is located less than 1.5 μm from the upper surface of the n+-type semiconductor layer. This configuration aims to further reduce leakage currents, enhancing the overall functionality of power devices.

Career Highlights

Atsushi Terai is currently associated with Flosfia Inc., a company known for its advancements in semiconductor technology. His work at Flosfia has allowed him to focus on innovative solutions that address critical challenges in the semiconductor industry.

Collaborations

Throughout his career, Atsushi has collaborated with notable colleagues, including Mitsuru Okigawa and Fujio Okui. These partnerships have fostered a collaborative environment that encourages the exchange of ideas and expertise in semiconductor research.

Conclusion

Atsushi Terai's contributions to semiconductor technology through his patents demonstrate his commitment to innovation and excellence. His work continues to influence the development of more efficient power devices, showcasing the importance of reducing leakage currents in semiconductor applications.

Profile summary based on public USPTO records.
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