Bengaluru, India

Ashish Agrawal

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ashish Agrawal. Retrieved from https://idiyas.com/inventor/ashish-agrawal-ery2u5qx

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Ashish Agrawal: Inventor in Bengaluru

Introduction

Ashish Agrawal is an inventor based in Bengaluru, India. His patent work includes a self-correcting architecture for detecting sideband initialization patterns.

Latest Patents

Agrawal is associated with 1 patent, titled “Self-correcting pattern detection architecture.” The invention concerns detecting sideband initialization (SBINIT) patterns. It describes a circuit that receives first and second SBINIT patterns, along with resetting pattern-detection circuitry that shifts match or mismatch information from the current pattern to the previous pattern when a reset pulse occurs.

Career Highlights

Agrawal works at Cadence Design Systems, Inc. His patent reflects work on pattern-detection logic and reset behavior in electronic design systems.

Collaborations

Agrawal’s listed coworker is Vikas Kumar Agrawal.

Conclusion

Ashish Agrawal’s patent focuses on self-correcting SBINIT pattern detection, contributing to his work in electronic design at Cadence Design Systems, Inc.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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