The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

Jul. 30, 2024
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Ashish Agrawal, Bangalore, IN;

Vikas Kumar Agrawal, Bangalore, IN;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3187 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3187 (2013.01);
Abstract

Embodiments included herein are directed towards sideband initialization (SBINIT) pattern detection. Embodiments include providing a self-correcting SBINIT pattern detection circuit configured to receive a first SBINIT pattern and a second SBINIT pattern. Embodiments further include providing resetting pattern detection circuit operatively connected with the self-correcting SBINIT pattern detection logic, wherein a reset pulse is configured to shift match/mismatch information of a current pattern to a previous pattern.


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Agrawal, Ashish. (2026). Self-correcting pattern detection architecture (U.S. Patent No. 12730151). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12730151

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