Austin, TX, United States of America

Arthur D Kahlich

This inventor holds 1 USPTO granted patent. Top assignee: Motorola Corporation. Active years: 1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Arthur D Kahlich. Retrieved from https://idiyas.com/inventor/arthur-d-kahlich

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 1998

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1 patent (USPTO):Explore Patents

Title: Arthur D Kahlich: Innovator in Cache Memory Technology

Introduction

Arthur D Kahlich is a notable inventor based in Austin, TX (US). He has made significant contributions to the field of cache memory technology, particularly with his innovative patent that enhances the efficiency of read-modify-write operations.

Latest Patents

Kahlich holds a patent for a "Cache memory having a read-modify-write operation and simultaneous burst." This invention describes a multiple-way, set associative cache memory that allows burst read and burst write operations to occur simultaneously on different columns within a memory block during a read-modify-write operation. The technology utilizes write column logic and read column logic to optimize the timing of these operations, ultimately increasing speed and reducing power consumption.

Career Highlights

Arthur D Kahlich has had a distinguished career, working at Motorola Corporation, where he has been able to apply his innovative ideas in practical applications. His work has contributed to advancements in memory technology, which are crucial for modern computing.

Collaborations

Kahlich has collaborated with notable colleagues such as Kenneth W Jones and Mark D Bader, further enhancing the impact of his work in the field.

Conclusion

Arthur D Kahlich's contributions to cache memory technology exemplify the importance of innovation in enhancing computing efficiency. His patent reflects a significant advancement in memory operations, showcasing his role as a key inventor in this domain.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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