logo

For the Inventor, By the Inventor

San Jose, CA, United States of America

Anubhav Khandelwal

This inventor holds 41 USPTO granted patents and 4 published patent applications and 3 EPO patents, primarily in Non-Volatile Memory. Top assignees: Sandisk Technologies Inc., Western Digital Technologies, Inc., Sandisk Corporation. Active years: 2011-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Anubhav Khandelwal. Retrieved from https://idiyas.com/inventor/anubhav-khandelwal

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 41 

% Patents Active = 70.7

 

Average Co-Inventor Count = 3.0

ph-index = 8

Forward Citations = 185(Granted Patents)


Location History:

  • Campbell, CA (US) (2015)
  • Mountain View, CA (US) (2011 - 2018)
  • San Jose, CA (US) (2017 - 2024)

Company Filing History:

goldMedal34 out of 4,955 
 
Sandisk Technologies Inc.
 patents
silverMedal6 out of 5,429 
 
Western Digital Technologies, Inc.
 patents
bronzeMedal1 out of 1,339 
 
Sandisk Corporation
 patents

Years Active: 2011-2026

Loading Chart...
Loading Chart...
Areas of Expertise:
Memory Apparatus
Dynamic Max Program Loop
NAND Programming
Bit Error Rate
Erase Fail Detection
Data Retention
Performance Improvement
High-Performance Write Operations
Read Disturb Reduction
Erase Verify Techniques
Partial Select Gates
Temperature Compensation
41 patents (USPTO):Explore Patents
1. 12755789 - Control gate signal for data retention in nonvolatile memory (2026-10-06),
2. 12718886 - Word line bias during stripe erase in a memory device (2026-08-25),
3. 12706172 - Faster method to prevent hybrid single level cell defects in system (2026-08-11),
4. 12542183 - Memory apparatus and method of operation using dynamic max program loop (2026-02-03),
5. 12494255 - Real time ramp rate adjustment for better performance and current consumption tradeoff (2025-12-09),
6. 12462877 - Program pulse duration increase for NAND program failure (2025-11-04),
7. 12436686 - Enhanced bit error rate estimation scan process (2025-10-07),
8. 12380960 - Non-volatile memory with faster post-erase defect testing (2025-08-05),
9. 12353275 - Optimized erratic program detection process (2025-07-08),
10. 12334160 - Apparatus and method for detecting neighbor plane erase failures (2025-06-17),
11. 12272417 - Vera detection method to catch erase fail (2025-04-08),
12. 12087363 - Control gate signal for data retention in nonvolatile memory (2024-09-10),
13. 11605430 - Control gate signal for data retention in nonvolatile memory (2023-03-14),
14. 11581049 - System and methods for programming nonvolatile memory having partial select gate drains (2023-02-14),
15. 11574693 - Memory apparatus and method of operation using periodic normal erase dummy cycle to improve stripe erase endurance and data retention (2023-02-07),

Title: The Innovative Journey of Anubhav Khandelwal

Introduction:

Anubhav Khandelwal, a visionary inventor based in San Jose, CA, has made significant contributions to the field of technology through his groundbreaking innovations and patents.

Latest Patents:

Anubhav Khandelwal holds several patents in the areas of artificial intelligence, machine learning, and data analytics, showcasing his expertise in cutting-edge technologies that are shaping the future.

Career Highlights:

With a background in computer science and engineering, Anubhav has a proven track record of developing innovative solutions that have revolutionized industries. His work has been recognized for its impact on enhancing efficiency and driving progress.

Collaborations:

Throughout his career, Anubhav has collaborated with leading tech companies and research institutions to further his inventions and bring them to market. His ability to work across disciplines has led to the creation of groundbreaking technologies.

Conclusion:

Anubhav Khandelwal's passion for innovation and his dedication to pushing the boundaries of technology have established him as a prominent figure in the world of inventors. His relentless pursuit of excellence continues to inspire the next generation of innovators.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…