Ghaziabad, India

Anand Gupta

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Anand Gupta. Retrieved from https://idiyas.com/inventor/anand-gupta-eeubaugk

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations by Anand Gupta in FPGA Systems

Introduction

Anand Gupta is a notable inventor based in Ghaziabad, India. He has made significant contributions to the field of circuit design testing, particularly through his innovative patent. His work focuses on enhancing the functionality and efficiency of FPGA systems.

Latest Patents

Anand Gupta holds a patent for a "Programmable sequence-driven hardware trigger for multiple FPGA system." This invention discloses systems and methods for a prototyping system that facilitates circuit design testing. The prototyping system utilizes hardware known as 'Debug FPGA' to perform a series of Boolean evaluations based on testbench configurations that are loaded at runtime. The FPGAs that execute the Device Under Test (DUT) operate synchronously, ensuring that each component starts, stops, and steps through the DUT's operations according to the Boolean operations of the Debug FPGA. The disclosed hardware and software functions allow for the simultaneous stopping of the clocks of the FPGAs based on user-defined trigger conditions in the DUT output. This capability enables designers to halt the prototyping system for analysis or debugging purposes. The Boolean expressions of the Debug FPGA are designed to detect state transitions or trigger events occurring within the DUT. Upon detecting a trigger event, the Debug FPGA sends a clock-stopping signal to each of the FPGAs.

Career Highlights

Anand Gupta is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of electronic design automation. His work has been instrumental in advancing the capabilities of FPGA systems, making them more efficient and user-friendly.

Collaborations

Anand has collaborated with notable colleagues such as Shantanu Telharkar and Sheng-Shiung Wu, contributing to various projects that enhance the functionality of electronic systems.

Conclusion

Anand Gupta's contributions to the field of FPGA systems through his innovative patent demonstrate his expertise and commitment to advancing technology. His work not only improves circuit design testing but also sets a foundation for future innovations in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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