Longmont, CO, United States of America

Amit Bhardwaj

This inventor holds 2 USPTO granted patents and 1 published patent application. Top assignee: Micron Technology Incorporated. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Amit Bhardwaj. Retrieved from https://idiyas.com/inventor/amit-bhardwaj-dnft0868

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 2 

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Innovations by Inventor Amit Bhardwaj

Introduction

Amit Bhardwaj is a notable inventor based in Longmont, Colorado. He has made significant contributions to the field of memory systems, particularly in handling read and program failures. With a total of 2 patents to his name, his work is recognized for its innovative approaches to improving memory subsystem reliability.

Latest Patents

Amit Bhardwaj's latest patents include "Handling read-verify failure in zone memory system" and "Handling program failure in zone memory system." The first patent addresses the challenges of block read-verify failures during data migration and refresh processes in memory subsystems that support zones. The second patent focuses on managing block program failures during various operations, including data writes and refreshes in cache and non-cache blocks of a memory device.

Career Highlights

Amit Bhardwaj is currently employed at Micron Technology Incorporated, where he continues to develop innovative solutions in memory technology. His expertise in memory subsystems has positioned him as a valuable asset to the company and the industry.

Collaborations

Amit collaborates with talented coworkers, including Juane Li and Michael Winterfeld. Their combined efforts contribute to advancing the technology and addressing complex challenges in memory systems.

Conclusion

Amit Bhardwaj's contributions to memory technology through his patents demonstrate his commitment to innovation and problem-solving in the field. His work continues to influence advancements in memory subsystems, ensuring greater reliability and efficiency.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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