This inventor holds 1 USPTO granted patent. Top assignee: Tokyo Electron Limited. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Amir Taghavi Nasrabadi: Semiconductor Processing Innovation
Introduction
Amir Taghavi Nasrabadi is an inventor based in Austin, Texas, whose patent work addresses wafer processing for semiconductor manufacturing. He is associated with Tokyo Electron Limited and is named on 1 patent.
Latest Patents
His patent, “Mitigation of Capillary Pattern Collapse in Supercritical Dry,” describes a method for removing solvent from a wafer surface using a supercritical fluid. The wafer is loaded into a processing chamber with a solvent film containing a first solvent and a second solvent. The first solvent makes up at least 50 percent but less than 100 percent of the film by mass, while the second makes up more than 0 percent and no more than 50 percent. The second solvent has higher vapor pressure and lower surface tension than the first.
A processing fluid is supplied to the chamber and becomes a supercritical fluid. The two solvents dissolve into it, forming a supercritical mixture that removes them from the wafer’s top surface. The mixture is then discharged from the chamber. The approach is intended to mitigate capillary pattern collapse during supercritical drying.
Career Highlights
Nasrabadi’s listed patent reflects work on wafer-processing techniques relevant to semiconductor fabrication. His association with Tokyo Electron Limited connects his invention to a company active in semiconductor production equipment.
Collaborations
Derek Bassett and Rencheng Dong are identified as some of Nasrabadi’s coworkers. The provided information does not specify their roles in the patent or describe particular collaborative projects.
Conclusion
Amir Taghavi Nasrabadi’s patent focuses on using a supercritical solvent mixture to remove liquids from wafer surfaces while addressing capillary pattern collapse, highlighting a practical challenge in semiconductor processing.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
