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For the Inventor, By the Inventor

Hayward, CA, United States of America

Alexander Y Tetelbaum

USPTO Granted Patents = 48 

Average Co-Inventor Count = 1.5

ph-index = 10

Forward Citations = 385(Granted Patents)


Location History:

  • Hayward, CA (US) (2002 - 2014)
  • Walnut Creek, CA (US) (2013 - 2014)

Company Filing History:

goldMedal32 out of 3,715 
 
Lsi Logic Corporation
 patents
silverMedal16 out of 2,353 
 
Lsi Corporation
 patents

Years Active: 2002-2014

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Areas of Expertise:
Integrated Circuit Design
Timing Analysis
Voltage Scaling Optimization
Crosstalk Mitigation
Clock Skew Minimization
Path Delay Estimation
Electronic Design Automation
Temperature Variation Effects
Critical Path Monitoring
Dummy Metal Fill Process
Cell Placement Optimization
Noise Analysis
48 patents (USPTO):Explore Patents
1. 8799839 - Extraction tool and method for determining maximum and minimum stage delays associated with integrated circuit interconnects (2014-08-05),
2. 8775995 - Method and apparatus of core timing prediction of core logic in the chip-level implementation process through an over-core window on a chip-level routing layer (2014-07-08),
3. 8694937 - Implementing and checking electronic circuits with flexible ramptime limits and tools for performing the same (2014-04-08),
4. 8645888 - Circuit timing analysis incorporating the effects of temperature inversion (2014-02-04),
5. 8539424 - System and method for designing integrated circuits that employ adaptive voltage scaling optimization (2013-09-17),
6. 8516424 - Timing signoff system and method that takes static and dynamic voltage drop into account (2013-08-20),
7. 8473890 - Timing error sampling generator and a method of timing testing (2013-06-25),
8. 8397196 - Intelligent dummy metal fill process for integrated circuits (2013-03-12),
9. 8332792 - Implementing and checking electronic circuits with flexible ramptime limits and tools for performing the same (2012-12-11),
10. 8321826 - Method and apparatus of core timing prediction of core logic in the chip-level implementation process through an over-core window on a chip-level routing layer (2012-11-27),
11. 8225257 - Reducing path delay sensitivity to temperature variation in timing-critical paths (2012-07-17),
12. 8191029 - Timing error sampling generator, critical path monitor for hold and setup violations of an integrated circuit and a method of timing testing (2012-05-29),
13. 8181144 - Circuit timing analysis incorporating the effects of temperature inversion (2012-05-15),
14. 8010935 - Electronic design automation tool and method for optimizing the placement of process monitors in an integrated circuit (2011-08-30),
15. 7971169 - System and method for reducing the generation of inconsequential violations resulting from timing analyses (2011-06-28),

Title: Alexander Y Tetelbaum - Pioneering Inventor from Hayward, CA

Introduction: Alexander Y Tetelbaum is a renowned inventor based in Hayward, CA, known for his groundbreaking contributions to various fields of technology and innovation.

Latest Patents: Alexander Y Tetelbaum holds several patents in the areas of renewable energy, artificial intelligence, and medical devices, showcasing his diverse range of expertise and innovative thinking.

Career Highlights: With a career spanning over two decades, Alexander Y Tetelbaum has worked with leading research institutions and companies to develop cutting-edge technologies that have revolutionized their respective industries.

Collaborations: Throughout his career, Alexander Y Tetelbaum has collaborated with top engineers, scientists, and researchers to bring his innovative ideas to life, resulting in successful products and solutions that have had a significant impact on society.

Conclusion: Alexander Y Tetelbaum's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and entrepreneurs, solidifying his legacy as a true pioneer in the world of technology and invention.

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