Delhi, India

Abhijit Das

This inventor holds 1 USPTO granted patent. Top assignee: Mentor Graphics Corporation. Active years: 2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Abhijit Das. Retrieved from https://idiyas.com/inventor/abhijit-das-ifx23iwy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 10.0

ph-index = 1


Company Filing History:


Years Active: 2020

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1 patent (USPTO):Explore Patents

Title: Abhijit Das: Innovator in Networking System-on-Chip Verification

Introduction

Abhijit Das is a notable inventor based in Delhi, India. He has made significant contributions to the field of networking system-on-chip design verification. His innovative work focuses on improving latency testing techniques, which are crucial for efficient circuit design.

Latest Patents

Abhijit Das holds a patent for a technology titled "Latency test in networking system-on-chip verification." This patent involves techniques that enhance the verification process of networking systems. The technology utilizes a hardware model of interface circuitry implemented in a reconfigurable hardware modeling device. It associates arrival time information with messages delivered to the hardware model and latency information with messages dispatched by the model. The arrival time and latency information are determined with respect to a model time reference provided in the reconfigurable hardware modeling device. He has 1 patent to his name.

Career Highlights

Abhijit Das is currently employed at Mentor Graphics Corporation, where he continues to develop innovative solutions in the field of electronic design automation. His work has been instrumental in advancing the capabilities of system-on-chip designs.

Collaborations

Some of his notable coworkers include Suresh Krishnamurthy and Deepak Kumar Garg. Their collaboration has contributed to the success of various projects within the company.

Conclusion

Abhijit Das is a prominent figure in the realm of networking system-on-chip verification, with a focus on latency testing techniques. His contributions are paving the way for advancements in electronic design automation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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