% Expired Patents = 30.0

Forward Citations = 495

Loading Chart...

4 inventors (with patents filed for the assignee):

Raminda U Madurawe (18 out of 141 patents)

Nij Dorairaj (5 out of 11 patents)

Peter Ramyalal Suaris (1 out of 2 patents)

4. Thomas Henry White (1 out of 39 patents)

20 patents: Sort by Forward Citations

1. 7812458 - Pad invariant FPGA and ASIC devices (2010-10-12),

2. 7795913 - Programmable latch based multiplier (2010-09-14),

3. 7777319 - Three dimensional integrated circuits (2010-08-17),

4. 7759969 - Programmable logic devices comprising time multiplexed programmable interconnect (2010-07-20),

5. 7759705 - Semiconductor devices fabricated with different processing options (2010-07-20),

6. 7709314 - Semiconductor switching devices and fabrication methods (2010-05-04),

7. 7679399 - Programmable interconnect structures (2010-03-16),

8. 7673273 - MPGA products based on a prototype FPGA (2010-03-02),

9. 7656192 - Three dimensional integrated circuits (2010-02-02),

10. 7656190 - Incrementer based on carry chain compression (2010-02-02),

11. 7635988 - Multi-port thin-film memory devices (2009-12-22),

12. 7627848 - Bit stream compatible FPGA to MPGA conversions (2009-12-01),

13. 7602213 - Using programmable latch to implement logic (2009-10-13),

14. 7573294 - Programmable logic based latches and shift registers (2009-08-11),

15. 7573293 - Programmable logic based latches and shift registers (2009-08-11),

Company Overview

Tier Logic, Inc. is a technology company based in Santa Clara, California, specializing in advanced solutions for the gaming and entertainment industries. The organization focuses on developing innovative gaming systems and software, enhancing user experiences through cutting-edge technology. With a commitment to research and development, Tier Logic aims to push the boundaries of gaming technology, providing robust platforms that cater to the evolving needs of the market and its clientele.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 6 2026

20 Patents

#167 in Santa Clara, CA

#3,933 in California

#16,382 in US

#31,233 in the World

Santa Clara, CA, United States of America

Tier Logic, Inc.

Forward Citations = 495

4 inventors:

Raminda U Madurawe (18 out of 141 patents)

Nij Dorairaj (5 out of 11 patents)

Peter Ramyalal Suaris (1 out of 2 patents)

4. Thomas Henry White (1 out of 39 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Tier Logic, Inc.. Retrieved from https://idiyas.com/company/tier-logic

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]