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San Mateo, CA, United States of America

Sifive, Inc.

USPTO Granted Patents = 85

EPO Patents = 8

Trademarks = 4

Forward Citations = 27

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60 inventors (with patents filed for the assignee):

Wesley Waylon Terpstra (26 out of 26 patents)

Krste Asanovic (19 out of 20 patents)

Henry Cook (17 out of 17 patents)

4. Andrew Waterman (15 out of 15 patents)

5. John Ingalls (9 out of 9 patents)

6. Eric Andrew Gouldey (9 out of 9 patents)

7. Michael Klinglesmith (9 out of 9 patents)

8. Josh Smith (6 out of 6 patents)

9. Han Chen (5 out of 5 patents)

10. Yunsup Lee (5 out of 5 patents)

11. Mohit Gupta (4 out of 18 patents)

12. Ernest L Edgar (4 out of 4 patents)

13. Ryan Macdonald (4 out of 4 patents)

14. Santosh Mahadeo Narawade (4 out of 8 patents)

15. Jithin K (4 out of 7 patents)

Core Competencies:

Macro-op Fusion

Integrated Circuit Generation

Register Renaming

Out-of-order Processing

Masked Memory Accesses

Cache Management

Vector Instructions

Memory Protection

Debugging in SoC

Power Management

Atomic Memory Operations

Fault Tolerant Processing

85 patents: Sort by Forward Citations

1. 12493551 - Cache coherency state request vector encoding and use thereof (2025-12-09),

2. 12493465 - Vector load store operations in a vector pipeline using a single operation in a load store unit (2025-12-09),

3. 12487829 - Macro-op fusion for pipelined architectures (2025-12-02),

4. 12475284 - Integrated circuit generation using an integrated circuit shell (2025-11-18),

5. 12468540 - Technologies for prediction-based register renaming (2025-11-11),

6. 12437121 - Efficient processing of masked memory accesses (2025-10-07),

7. 12436770 - Window-based control for instruction issue in an out-of-order processor (2025-10-07),

8. 12430252 - Data storage in non-inclusive cache (2025-09-30),

9. 12430132 - Technologies for interconnect address remapper with event recognition and register management (2025-09-30),

10. 12423099 - Stateful vector group permutation with storage reuse (2025-09-23),

11. 12417163 - Selectable granularity performance monitor (2025-09-16),

12. 12417103 - Fusion with destructive instructions (2025-09-16),

13. 12399837 - Translation lookaside buffer (TLB) prefetcher with multi-level TLB prefetches and feedback architecture (2025-08-26),

14. 12399721 - Debug in system on a chip with securely partitioned memory space (2025-08-26),

15. 12386764 - Selective transfer of data including a priority byte (2025-08-12),

SiFive, Inc. is an American fabless semiconductor company that designs and produces chips based on the RISC-V instruction set architecture. They provide customizable silicon solutions with the mission to democratize access to custom semiconductors. SiFive offers a range of RISC-V processors, development boards, software platforms, and IP cores, empowering customers to create their own specialized chips for diverse applications.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Dec 23 2025

85 Patents

#15 in San Mateo, CA

#998 in California

#4,218 in US

#8,666 in the World

San Mateo, CA, United States of America

Sifive, Inc.

Forward Citations = 27

60 inventors:

Wesley Waylon Terpstra (26 out of 26 patents)

Krste Asanovic (19 out of 20 patents)

Henry Cook (17 out of 17 patents)

4. Andrew Waterman (15 out of 15 patents)

5. John Ingalls (9 out of 9 patents)

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