% Expired Patents = 42.9

Forward Citations = 59

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2 inventors (with patents filed for the assignee):

John F Croix (5 out of 15 patents)

Curtis L Ratzlaff (3 out of 6 patents)

7 patents: Sort by Forward Citations

1. 7970591 - Using impedance (Z) parameters to augment circuit simulation (2011-06-28),

2. 7444604 - Apparatus and methods for simulation of electronic circuitry (2008-10-28),

3. 7194716 - Apparatus and methods for cell models for timing and power analysis (2007-03-20),

4. 7191414 - Apparatus and methods for interconnect simulation in electronic circuitry using non-uniform time step (2007-03-13),

5. 7155691 - Apparatus and methods for compiled static timing analysis (2006-12-26),

6. 7065720 - Apparatus and methods for current-based models for characterization of electronic circuitry (2006-06-20),

7. 7013440 - Apparatus and methods for interconnect characterization in electronic circuitry (2006-03-14),

Company Overview

Nascentric, Inc. is a leading provider of electronic design automation (EDA) software and services. Our innovative solutions help semiconductor companies optimize their chip design process, reduce time-to-market, and improve design quality. With a focus on advanced technologies such as artificial intelligence and machine learning, Nascentric is dedicated to pushing the boundaries of EDA to drive the next generation of semiconductor innovation.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

7 Patents

#385 in Austin, TX

#2,553 in Texas

#39,907 in US

Austin, TX, United States of America

Nascentric, Inc.

Forward Citations = 59

2 inventors:

John F Croix (5 out of 15 patents)

Curtis L Ratzlaff (3 out of 6 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Nascentric, Inc.. Retrieved from https://idiyas.com/company/nascentric

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]