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Microsemi Semiconductor Ulc

USPTO Granted Patents = 46

% Expired Patents = 2.2

EPO Patents = 4

Trademarks = 1

Forward Citations = 363

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42 inventors (with patents filed for the assignee):

Kamran Rahbar (14 out of 21 patents)

Qu Gary Jin (13 out of 16 patents)

Krste Mitric (10 out of 14 patents)

4. Paul H L M Schram (7 out of 7 patents)

5. Slobodan Milijevic (5 out of 7 patents)

6. Tanmay Zargar (4 out of 12 patents)

7. Mark A Warriner (4 out of 4 patents)

8. Gabriel Rusaneanu (4 out of 4 patents)

9. Guohui Situ (4 out of 4 patents)

10. David Colby (3 out of 4 patents)

11. Tariq Haddad (3 out of 3 patents)

12. Wenbao Wang (3 out of 5 patents)

13. Peter Meyer (2 out of 3 patents)

14. Xihao Li (2 out of 2 patents)

15. Richard Geiss (2 out of 4 patents)

Core Competencies:

Phase Locked Loop

Clock Recovery

Digital Clock Fault Detection

Temperature-Stable Clocks

Signal Processing

Timing Recovery

Noise Reduction

Asynchronous Packet Networks

Crystal Oscillator

Frequency Stabilization

Data Transmission

Circuit Design

46 patents: Sort by Forward Citations

1. 12316728 - Phase and frequency error processing (2025-05-27),

2. 11239933 - Systems and methods for transporting constant bit rate client signals over a packet transport network (2022-02-01),

3. 10992301 - Circuit and method for generating temperature-stable clocks using ordinary oscillators (2021-04-27),

4. 10986730 - Techniques for routing electrical signals through electrical components and related methods (2021-04-20),

5. 10917097 - Circuits and methods for transferring two differentially encoded client clock domains over a third carrier clock domain between integrated circuits (2021-02-09),

6. 10715307 - Embedded time of day receiver for clock transmission (2020-07-14),

7. 10594300 - Digital phase locked loop clock synthesizer with image cancellation (2020-03-17),

8. 10404447 - Clock recovery device with state machine controller (2019-09-03),

9. 10325613 - Acoustic delay estimation (2019-06-18),

10. 10250379 - Clock recovery device with switchable transient non-linear phase adjuster (2019-04-02),

11. 10234895 - Clock synthesizer with hitless reference switching and frequency stabilization (2019-03-19),

12. 10148274 - Non-linear oven-controlled crystal oscillator compensation circuit (2018-12-04),

13. 10128826 - Clock synthesizer with integral non-linear interpolation (INL) distortion compensation (2018-11-13),

14. 10069503 - Method of speeding up output alignment in a digital phase locked loop (2018-09-04),

15. 10009033 - Noise reduction in non-linear signal processing (2018-06-26),

Company Overview

Microsemi Semiconductor Ulc, located in Kanata, Canada, specializes in advanced semiconductor solutions with a focus on timing and synchronization technologies. The company develops products such as phase locked loops, clock recovery systems, and temperature-stable clocks, catering to various industries that require precise signal processing and noise reduction. Their expertise in synchronous serial interfaces and digital phase locked loops positions them as a key player in the semiconductor market, driving innovation in high-performance applications.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 6 2026

46 Patents

#9 in Kanata

#303 in Canada

#15,096 in the World

Microsemi Semiconductor Ulc

Forward Citations = 363

42 inventors:

Kamran Rahbar (14 out of 21 patents)

Qu Gary Jin (13 out of 16 patents)

Krste Mitric (10 out of 14 patents)

4. Paul H L M Schram (7 out of 7 patents)

5. Slobodan Milijevic (5 out of 7 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Microsemi Semiconductor Ulc. Retrieved from https://idiyas.com/company/microsemi-semiconductor-ulc

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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