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For the Inventor, By the Inventor

Tokyo, Japan

Lptex Corporation


USPTO Granted Patents = 3

Forward Citations = 0

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3 inventors (with patents filed for the assignee):

goldMedal Seiji Kajihara (3 out of 18 patents)

silverMedal Xiaoqing Wen (3 out of 43 patents)

bronzeMedal Kohei Miyase (2 out of 10 patents)


3 patents:

1. 8589751 - Don't-care-bit identification method and don't-care-bit identification program (2013-11-19),
2. 8453023 - Target logic value determination method for unspecified bit in test vector for combinational circuit and non-transitory computer-readable medium (2013-05-28),
3. 8117513 - Test method and test program of semiconductor logic circuit device (2012-02-14),
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USPTO Data Jan 1 1976 - Dec 2 2025

3 Patents

#3,271 in Tokyo

#8,779 in Japan

...
Tokyo, Japan

Lptex Corporation

Forward Citations = 0

3 inventors:

goldMedal Seiji Kajihara (3 out of 18 patents)

silverMedal Xiaoqing Wen (3 out of 43 patents)

bronzeMedal Kohei Miyase (2 out of 10 patents)

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