For the Inventor, By the Inventor

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San Jose, CA, United States of America

Inapac Technology, Inc.

USPTO Granted Patents = 30

% Expired Patents = 46.7

Forward Citations = 646

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6 inventors (with patents filed for the assignee):

Adrian E Ong (29 out of 118 patents)

Fan Ho (3 out of 53 patents)

Douglas W Gorgen (2 out of 5 patents)

4. Naresh Baliga (1 out of 4 patents)

5. Chiate Lin (1 out of 1 patent)

6. Richard G Egan (1 out of 1 patent)

Core Competencies:

Integrated Circuit

Testing Module

Memory Access

Data Compression

Chip Testing

Address Generator

Delay Lock Loop

Dynamic Data Bus

Bonding Pads

Multi-Chip Package

Signal Monitoring

Test Mode

30 patents: Sort by Forward Citations

1. 7466603 - Memory accessing circuit system (2008-12-16),

2. 7466160 - Shared memory bus architecture for system with processor and memory units (2008-12-16),

3. 7446551 - Integrated circuit testing module including address generator (2008-11-04),

4. 7444575 - Architecture and method for testing of an integrated circuit device (2008-10-28),

5. 7443188 - Electronic device having an interface supported testing mode (2008-10-28),

6. 7404117 - Component testing and recovery (2008-07-22),

7. 7370256 - Integrated circuit testing module including data compression (2008-05-06),

8. 7365557 - Integrated circuit testing module including data generator (2008-04-29),

9. 7313740 - Internally generating patterns for testing in an integrated circuit device (2007-12-25),

10. 7310000 - Integrated circuit testing module including command driver (2007-12-18),

11. 7309999 - Electronic device having an interface supported testing mode (2007-12-18),

12. 7307442 - Integrated circuit test array including test module (2007-12-11),

13. 7269524 - Delay lock loop delay adjusting method and apparatus (2007-09-11),

14. 7265570 - Integrated circuit testing module (2007-09-04),

15. 7259582 - Bonding pads for testing of a semiconductor device (2007-08-21),

Company Overview

Inapac Technology, Inc. is a technology company based in San Jose, California, specializing in advanced semiconductor solutions. The organization focuses on the development and manufacturing of innovative materials and processes that enhance the performance and efficiency of electronic devices. With a commitment to research and development, Inapac is at the forefront of technology that supports various industries, including telecommunications and consumer electronics, driving advancements in the global market.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

30 Patents

#264 in San Jose, CA

#2,682 in California

#11,279 in US

#21,912 in the World

San Jose, CA, United States of America

Inapac Technology, Inc.

Forward Citations = 646

6 inventors:

Adrian E Ong (29 out of 118 patents)

Fan Ho (3 out of 53 patents)

Douglas W Gorgen (2 out of 5 patents)

4. Naresh Baliga (1 out of 4 patents)

5. Chiate Lin (1 out of 1 patent)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Inapac Technology, Inc.. Retrieved from https://idiyas.com/company/inapac-technology

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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