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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9938638 B1

PDFFull Text
Date of Patent:
Apr. 10, 2018

Filed:

Feb. 10, 2015

Method for producing semiconductor epitaxial wafer and semiconductor epitaxial wafer

Applicant:

Shin-etsu Handotai Co., Ltd., Tokyo, JP;

Inventors:

Kazunori Hagimoto, Takasaki, JP;

Masaru Shinomiya, Annaka, JP;

Keitaro Tsuchiya, Takasaki, JP;

Hirokazu Goto, Minato-ku, JP;

Ken Sato, Miyoshi-machi, JP;

Hiroshi Shikauchi, Niiza, JP;

Shoichi Kobayashi, Jyoetsu, JP;

Hirotaka Kurimoto, Jyoetsu, JP;

Assignee:

SHIN-ETSU HANDOTAI CO., LTD., Tokyo, JP;

Attorney:

Oliff PLC

Primary Examiner:

Anita K Alanko

Int. Cl.
CPC ...
C30B 33/00 (2006.01); H01L 21/02 (2006.01); H01L 21/78 (2006.01); H01L 29/20 (2006.01); C23C 16/34 (2006.01); C23C 16/56 (2006.01); C30B 25/18 (2006.01); C30B 29/40 (2006.01); C30B 33/10 (2006.01); H01L 29/32 (2006.01); H01L 21/66 (2006.01); C30B 25/00 (2006.01);
U.S. Cl.
CPC ...
C30B 33/00 (2013.01); C23C 16/34 (2013.01); C23C 16/56 (2013.01); C30B 25/00 (2013.01); C30B 25/183 (2013.01); C30B 29/406 (2013.01); C30B 33/10 (2013.01); H01L 21/02013 (2013.01); H01L 21/02019 (2013.01); H01L 21/02021 (2013.01); H01L 21/02024 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02378 (2013.01); H01L 21/02381 (2013.01); H01L 21/02458 (2013.01); H01L 21/7806 (2013.01); H01L 22/12 (2013.01); H01L 22/20 (2013.01); H01L 29/2003 (2013.01); H01L 29/32 (2013.01);
Abstract

A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.

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