The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2018

Filed:

Oct. 09, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Ya-Lien Lee, Hsinchu County, TW;

Hung-Wen Su, Hsinchu County, TW;

Kuei-Pin Lee, New Taipei, TW;

Yu-Hung Lin, Taichung, TW;

Yu-Min Chang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/768 (2006.01); H01L 23/50 (2006.01); H01L 23/532 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76843 (2013.01); H01L 21/76802 (2013.01); H01L 21/76829 (2013.01); H01L 21/76879 (2013.01); H01L 23/50 (2013.01); H01L 23/53238 (2013.01); H01L 21/2855 (2013.01); H01L 21/28562 (2013.01); H01L 21/76807 (2013.01); H01L 23/53295 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method of fabricating an integrated circuit includes depositing a cap layer on a substrate; depositing a dielectric layer on the cap layer; and forming a trench in the dielectric layer. The method further includes depositing a tantalum nitride (TaN) layer on a sidewall of the trench such that the TaN layer has a greater concentration of nitrogen than tantalum. The method further includes depositing a tantalum (Ta) layer on the TaN layer using physical vapor deposition (PVD); and depositing a metal layer over the Ta layer.


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