The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2017

Filed:

Jul. 30, 2015
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Gustavo G. Francken, Pleasanton, CA (US);

Brandon Senn, Molalla, OR (US);

Peter Thaulad, San Jose, CA (US);

Zhuozhi Chen, Mountain View, CA (US);

Richard K. Lyons, Sandy, OR (US);

Christian DiPietro, Sherwood, OR (US);

Christopher M. Bartlett, Beaverton, OR (US);

Assignee:

LAM RESEARCH CORPORATION, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/68 (2006.01); G06T 7/00 (2017.01); G06T 7/73 (2017.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
H01L 21/681 (2013.01); G06T 7/0004 (2013.01); G06T 7/73 (2017.01); H01L 21/67201 (2013.01); H01L 21/682 (2013.01); G06T 2207/30148 (2013.01); Y10S 901/02 (2013.01); Y10S 901/47 (2013.01);
Abstract

A wafer alignment system includes an image capture device that captures an image of a wafer positioned on a pedestal. An image analysis module analyzes the image to detect an edge of the wafer and a notch formed in the edge of the wafer and calculates, based on a position of the notch, first and second edge positions corresponding to the edge of the wafer. An offset calculation module calculates an angular offset of the wafer based on the first position and the second edge positions. A system control module controls transfer of the wafer from the pedestal to a process cell based on the angular offset.


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