The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2017
Filed:
Dec. 13, 2016
Fuji Electric Co., Ltd., Kawasaki-shi, JP;
Kin-On Sin, Kowloon, CN;
Chun-Wai Ng, Kowloon, CN;
Hitoshi Sumida, Matsumoto, JP;
Yoshiaki Toyada, Matsumoto, JP;
Akihiko Ohi, Nagano, JP;
Hiroyuki Tanaka, Nagano, JP;
Takeyoshi Nishimura, Matsumoto, JP;
FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;
Abstract
A mask used to form an nsource layer () is formed by a nitride film on the surface of a substrate before a trench () is formed. At this time, a sufficient width of the nsource layer () on the surface of the substrate is secured. Thereby, stable contact between the nsource layer () and a source electrode () is obtained. A CVD oxide film () that is an interlayer insulating film having a thickness of 0.1 micrometer or more and 0.3 micrometer or less is formed on doped poly-silicon to be used as a gate electrode () embedded in the trench (), and non-doped poly-silicon () that is not oxidized is formed on the CVD oxide film (). Thereby, generation of void in the CVD oxide film () is suppressed and, by not oxidizing the non-doped poly-silicon (), a semiconductor apparatus is easily manufactured.