The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2017

Filed:

Apr. 05, 2016
Applicant:

Xintec Inc., Taoyuan, TW;

Inventors:

Yen-Shih Ho, Kaohsiung, TW;

Shu-Ming Chang, New Taipei, TW;

Hsing-Lung Shen, Hsinchu, TW;

Assignee:

XINTEC INC., Taoyuan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/16 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 23/14 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/17 (2013.01); H01L 21/4846 (2013.01); H01L 23/3121 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 24/06 (2013.01); H01L 24/09 (2013.01); H01L 24/14 (2013.01); H01L 25/16 (2013.01); H01L 23/147 (2013.01); H01L 23/3192 (2013.01); H01L 23/49816 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/0391 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/06182 (2013.01); H01L 2224/08267 (2013.01); H01L 2224/08268 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/16112 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16267 (2013.01); H01L 2224/16268 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/81986 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/19011 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01);
Abstract

A chip package includes a first chip and a second chip. The first chip includes a first substrate having a first surface and a second surface opposite to the first surface, a first passive element on the first surface, and a first protection layer covering the first passive element, which the first protection layer has a third surface opposite to the first surface. First and second conductive pad structures are disposed in the first protection layer and electrically connected to the first passive element. The second chip is disposed on the third surface, which the second chip includes an active element and a second passive element electrically connected to the active element. The active element is electrically connected to the first conductive pad structure.


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