The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2017

Filed:

Apr. 22, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yuan-Hung Liu, Hsinchu, TW;

Ku-Feng Yang, Dali, TW;

Pei-Ching Kuo, Hsinchu, TW;

Ming-Tsu Chung, Hsinchu, TW;

Hsin-Yu Chen, Taipei, TW;

Tsang-Jiuh Wu, Hsinchu, TW;

Wen-Chih Chiou, Miaoli, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76898 (2013.01); H01L 21/7684 (2013.01); H01L 21/76831 (2013.01); H01L 21/76879 (2013.01); H01L 23/481 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 21/2855 (2013.01); H01L 21/28556 (2013.01); H01L 21/7682 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05009 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/13091 (2013.01);
Abstract

A method of forming an integrated circuit includes forming at least one opening through a first surface of a substrate. The method further includes forming at least one conductive structure in the at least one opening. The method further includes removing a portion of the substrate to form a processed substrate having the first surface and a second surface opposite the first surface and to expose a portion of the at least one conductive structure adjacent to the second surface. The at least one conductive structure continuously extending from the first surface through the processed substrate to the second surface of the processed substrate, at least one sidewall of the at least one conductive structure spaced from a sidewall of the at least one opening by an air gap.


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