The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2017

Filed:

Aug. 31, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Manish Dubey, Chandler, AZ (US);

Rajendra C. Dias, Phoenix, AZ (US);

Baris Bicen, Chandler, AZ (US);

Digvijay Raorane, Chandler, AZ (US);

Bharat P. Penmecha, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/563 (2013.01); H01L 23/3142 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/83801 (2013.01); H01L 2924/1511 (2013.01); H01L 2924/1515 (2013.01); H01L 2924/3511 (2013.01);
Abstract

An electronic package that includes a substrate and a die attached to the substrate. A plurality of supports attached to the substrate adjacent to the die. At least one support in the plurality of supports is positioned adjacent to at least one corner of the die such that the at least one corner of the die is positioned adjacent to the at least one support. Other example forms relate to a method of fabricating an electronic package. The method includes securing a die to a substrate and securing a plurality of supports to the substrate such that at least one support is adjacent to at least one corner of the die.


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