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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9685316 B1

PDFFull Text
Date of Patent:
Jun. 20, 2017

Filed:

Feb. 25, 2013

Semiconductor process

Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Chia Chang Hsu, Kaohsiung, TW;

Kuo-Chih Lai, Tainan, TW;

Chun-Ling Lin, Tainan, TW;

Bor-Shyang Liao, Kaohsiung, TW;

Pin-Hong Chen, Yunlin County, TW;

Shu Min Huang, Tainan, TW;

Min-Chung Cheng, Chiayi County, TW;

Chi-Mao Hsu, Tainan, TW;

Assignee:

UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;

Attorney:

Winston Hsu

Primary Examiner:

Stephanie Duclair

Int. Cl.
CPC ...
H01L 21/302 (2006.01); B44C 1/22 (2006.01); C03C 15/00 (2006.01); C03C 25/68 (2006.01); C23F 1/00 (2006.01); H01L 21/02 (2006.01); H01L 21/3213 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 21/67 (2006.01); H01L 21/3065 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02063 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/32136 (2013.01); H01L 21/6708 (2013.01); H01L 21/67109 (2013.01); H01L 21/76804 (2013.01); H01L 21/76814 (2013.01); H01L 21/28518 (2013.01); H01L 21/3065 (2013.01);
Abstract

A semiconductor process includes the following steps. A wafer on a pedestal is provided. The pedestal is lifted to approach a heating source and an etching process is performed on the wafer. An annealing process is performed on the wafer by the heating source. In another way, a wafer on a pedestal, and a heating source on a same side of the wafer as the pedestal are provided. An etching process is performed on the wafer by setting the temperature difference between the heating source and the pedestal larger than 180° C.

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