The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2017

Filed:

May. 13, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Houssam Wafic Jomaa, San Diego, CA (US);

Omar James Bchir, San Marcos, CA (US);

Kuiwon Kang, Seoul, KR;

Chin-Kwan Kim, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/535 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/4857 (2013.01); H01L 21/6835 (2013.01); H01L 21/76877 (2013.01); H01L 21/76895 (2013.01); H01L 23/5383 (2013.01); H01L 21/486 (2013.01); H01L 23/5384 (2013.01); H01L 2221/68345 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Methods and apparatus for formation of a semiconductor substrate with photoactive dielectric material, embedded traces, a padless skip via extending through two dielectric layers, and a coreless package are provided. In one embodiment, a method for forming a core having a copper layer; laminating the copper layer a photoactive dielectric layer; forming a plurality of trace patterns in the photoactive dielectric layer; plating the plurality of trace patterns to form a plurality of traces; forming an insulating dielectric layer on the photoactive dielectric layer; forming a via through the insulating dielectric layer and the photoactive dielectric layer; forming additional routing patterns on the insulating dielectric layer; removing the core; and applying a solder mask.


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