The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2017

Filed:

Apr. 16, 2013
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Nien-Ting Ho, Tainan, TW;

Chien-Hao Chen, Yunlin County, TW;

Hsin-Fu Huang, Tainan, TW;

Chi-Yuan Sun, Yunlin County, TW;

Wei-Yu Chen, Tainan, TW;

Min-Chuan Tsai, New Taipei, TW;

Tsun-Min Cheng, Changhua County, TW;

Chi-Mao Hsu, Tainan, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/148 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 21/8238 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28088 (2013.01); H01L 21/823842 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/6659 (2013.01); H01L 29/66545 (2013.01); H01L 29/165 (2013.01); H01L 29/513 (2013.01); H01L 29/665 (2013.01); H01L 29/7843 (2013.01); H01L 29/7848 (2013.01);
Abstract

A manufacturing method of a metal gate structure is provided. First, a substrate covered by an interlayer dielectric is provided. A gate trench is formed in the interlayer dielectric, wherein a gate dielectric layer is formed in the gate trench. A silicon-containing work function layer is formed on the gate dielectric layer in the gate trench. Finally, the gate trench is filled up with a conductive metal layer.


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